Characteristic evaluation apparatus for insulated gate type transistors

ABSTRACT

The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST 1.1 ). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST 1.6 ). From a shift amount (δ) which minimizes the standard deviation of the function F to be obtained (step ST 1.7 ), the true threshold voltage of the transistor with the narrow channel width is determined (step ST 1.10 ).

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a characteristic evaluationmethod for insulated gate type transistors which extracts theireffective channel widths, a characteristic evaluation apparatus forinsulated gate type transistors, a method of manufacturing insulatedgate type transistors by using the above characteristic evaluationmethod, and a computer readable storing medium storing a characteristicevaluation program.

[0003] 2. Description of the Background Art

[0004] An electrically effective channel width, i.e., an effectivechannel width W_(eff), can be determined from the drain currents of twoor more insulated gate type transistors having the same channel lengthand a different channel width. This method is generally called “draincurrent method.” The drain current method can directly determine thedifference between an effective channel width W_(eff) and a mask channelwidth W_(m), namely, a channel narrowing DW (=W_(m)−W_(eff)).

[0005] As a drain current method, a wide variety of methods have beenproposed heretofore. They are described, for example, in “A New Methodto Electrically determine Effective MOSFET Channel Width” by Y. R. Maand K. L. Wang, IEEE Trans. Elect. Dev., ED-29, p. 1825, 1982; “A NewMethod to Determine the MOSFET Effective Channel Width” by N. D. Arora,L. A. Blair and L. M. Richardson, IEEE Trans. Elect. Dev., ED-37(3), p.811, 1990; “A Method to Extract Gate-Bias-Dependent MOSFET's EffectiveChannel Width” by Y. T. Chia and G. J. Hu, IEEE Trans. Elect. Dev.,ED-38(2), p. 424, 1991; and “A Direct Method to Extract EffectiveGeometries and Series Resistances of MOS Transistors” by P. R. Karlssonand K. O. Jeppson, Proc. IEEE ICMTS, vol. 7, p. 184, 1994.

[0006] Of various drain current methods, Chia method is commonly oftenused. Thus, Chia method will be briefly described here. The totalsource-drain resistance R is given by the sum of a channel resistanceR_(ch) and an external resistance R_(sd). Now, supposing the followingEquation 1 as the equation to express drain current. $\begin{matrix}{I_{ds} = \frac{\beta_{0} \cdot \left( {V_{gs} - V_{th} - \frac{V_{ds}^{*}}{2}} \right) \cdot V_{ds}^{*}}{1 + {{\theta 1} \cdot \left( {V_{gs}^{*} - V_{th}} \right)} + {{\theta 2} \cdot \left( {V_{gs}^{*} - V_{th}} \right)^{2}}}} & \left( {{Eq}.\quad 1} \right)\end{matrix}$

[0007] where β₀, V_(ds)* and V_(gs)* are given by the followingEquations 2, 3 and 4, respectively, and θ1 and θ2 are the invariables.$\begin{matrix}{\beta_{0} = \frac{\mu_{0}C_{ox}W_{eff}}{L_{eff}}} & \left( {{Eq}.\quad 2} \right)\end{matrix}$

[0008] where μ₀ is a carrier mobility, L_(eff) is an effective channellength, W_(eff) is an effective channel width, and C_(ox) is a gateinsulating film capacity.

V _(ds) *=V _(ds) −I _(ds) ·R _(sd)   (Eq. 3)

[0009] $\begin{matrix}{V_{gs}^{*} = {V_{gs} - \frac{I_{ds} \cdot R_{sd}}{2}}} & \left( {{Eq}.\quad 4} \right)\end{matrix}$

[0010] Neglecting the term of θ2, Equation 5 is obtained from Equations1, 3 and 4. Supposing an external resistance R_(sd) is inverselyproportional to an effective channel width W_(eff), a channel narrowingDW can be extracted through the following procedure. $\begin{matrix}{I_{ds} = \frac{\beta_{0} \cdot \left( {V_{gs} - V_{th} - \frac{V_{ds}}{2}} \right) \cdot V_{ds}}{1 + {\left( {{\theta 1} + {\beta_{0} \cdot R_{sd}}} \right) \cdot \left( {V_{gs} - V_{th}} \right)}}} & \left( {{Eq}.\quad 5} \right)\end{matrix}$

[0011] where the difference between a gate voltage and a thresholdvoltage, (V_(gs)−V_(th)), is defined as a gate overdrive V_(gt).

[0012] Step 1: Against a certain gate overdrive V_(gt), I_(ds)−W_(m)characteristic is plotted in an X-Y plane whose X-axis is mask channelW_(m) and Y-axis is drain current I_(ds), and a linear fitting, is made.At that time, the intersection with the X-axis in the X-Y plane which isobtained by extrapolating each straight line is the channel narrowing DW(V_(gt)) in the gate overdrive V_(gt) (see FIG. 1).

[0013] Step 2: By repeating step 1 while changing the gate overdriveV_(gt), it can be seen how the channel narrowing DW (V_(gt)) depends onthe gate overdrive V_(gt) (see FIG. 1).

[0014] Prior art characteristic evaluation method for insulated typetransistors is constructed as described. In Chia method, for example, itis necessary to know the threshold voltage of a transistor for use inextraction. The threshold voltage of a transistor is found by, forexample, extrapolation from the characteristic between gate voltage andsource-drain current, as shown in FIG. 2. Therefore, the error due tothe uncertainty of a threshold voltage is further pronounced withreducing transistor size.

SUMMARY OF THE INVENTION

[0015] According to a first aspect of the present invention, acharacteristic evaluation apparatus for insulated gate type transistorsin which at least two insulated gate type transistors that differ fromeach other only in mask channel width are used for evaluation and thecharacteristic of a first insulated gate type transistor having a widemask channel width serves as a reference, to evaluate the characteristicof a second insulated gate type transistor having a narrow mask channelwidth. This apparatus comprises: a threshold voltage estimation meansthat extracts the threshold voltage of the first transistor, estimatesthe threshold voltage of the second transistor, and employs a value asestimated, as a first estimated value; an extraction means in which (i)a difference between a gate voltage of the first transistor and theextracted threshold voltage of the first transistor is defined as afirst gate overdrive, and a difference between a gate voltage of thesecond transistors and the first estimated value is defined as a secondgate overdrive, (ii) in an X-Y plane whose X-axis is the mask channelwidth and Y-axis is source-drain conductance, a virtual point at which achange of Y coordinate value is estimated to be approximately zero whenthe first and second gate overdrives are finely changed, is extractedfrom a characteristic curve exhibiting a relationship between the maskchannel widths of the first and second transistors and the source-drainconductance, (iii) values of the X coordinate and Y coordinate at thevirtual point are defined as second and third estimated values,respectively, and (iv) a slope of the characteristic curve at thevirtual point is extracted and a value of the slope is employed as afourth estimated value; a threshold voltage determination means in which(i) from the second to fourth estimated values, optimum second to fourthestimated values are found with which the change of the third estimatedvalue is equal to the product of the change of the second estimatedvalue and the fourth estimated value, in reply to fine changes of thefirst and second gate overdrives, (ii) an optimum first estimated valueis determined which corresponds to the optimum second to fourthestimated values, and (iii) a true threshold voltage of the secondtransistor is determined based on the optimum first estimated value; anda channel narrowing determination means that determines a differencebetween the mask channel width and an effective channel width, based onthe true threshold voltage.

[0016] According to a second aspect, the characteristic evaluationapparatus of the first aspect is characterized in that the extractionmeans approximates the characteristic curve by using a first straightline in the X-Y plane, the first straight line passing through a firstpoint that is given to the first transistor when the first gateoverdrive has a first value and a second point that is given to thesecond transistor when the second gate overdrive has the first value.

[0017] According to a third aspect, the characteristic evaluationapparatus of the second aspect is characterized in that the thresholdvoltage determination means determines the optimum second to fourthestimated values from a relational expression:${F\left( {\delta,V_{gtWi}} \right)} = {{{dW}^{**}\left( {\delta,V_{gtWi}} \right)} + {\frac{f\left( {\delta,V_{gtWi}} \right)}{f^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {{dW}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {{DW}^{*}\left( {\delta,V_{gtWi}} \right)}}$

[0018] where δ is a difference between an estimated value of thethreshold voltage of the second transistor, i.e., a first estimatedvalue, and the threshold voltage of the first transistor; V_(gtWi) isthe first gate overdrive; dW** is a value of an X intercept that isobtained by extrapolating the characteristic curve; f is the slope ofthe characteristic curve at the virtual point; DW* is an X coordinatevalue at the virtual point; and a prime is the first-orderdifferentiation of V_(gtWi).

[0019] According to a fourth aspect, the characteristic evaluationapparatus of the second aspect is characterized in that the thresholdvoltage determination means determines the optimum second to fourthestimated values from a relational expression:${F\left( {\delta,V_{gtWi}} \right)} = {{\frac{f^{2}\left( {\delta,V_{gtWi}} \right)}{f^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {{dW}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {G_{m}^{*}\left( {\delta,V_{gtWi}} \right)}}$

[0020] where δ is a difference between an estimated value of thethreshold voltage of the second transistor, i.e., a first estimatedvalue, and the threshold voltage of the first transistor; V_(gtWi) isthe first gate overdrive; dW** is a value of an X intercept that isobtained by extrapolating the characteristic curve; f is the slope ofthe characteristic curve at the virtual point; G_(m)* is a Y coordinatevalue at the virtual point; and a prime is the first-orderdifferentiation of V_(gtWi).

[0021] According to a fifth aspect, the characteristic evaluationapparatus of the second aspect is characterized in that the thresholdvoltage determination means determines the optimum second to fourthestimated values from a relational expression:${F\left( {\delta,V_{gtWi}} \right)} = {{G_{m}^{**}\left( {\delta,V_{gtWi}} \right)} - {\frac{f\left( {\delta,V_{gtWi}} \right)}{f^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {G_{m}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {G_{m}^{*}\left( {\delta,V_{gtWi}} \right)}}$

[0022] where δ is a difference between an estimated value of thethreshold voltage of the second transistor, i.e., a first estimatedvalue, and the threshold voltage of the first transistor; V_(gtWi) isthe first gate overdrive; G_(m)** is a value of a Y intercept that isobtained by extrapolating the characteristic curve; f is the slope ofthe characteristic curve at the virtual point; G_(m)* is a Y coordinatevalue at the virtual point; and a prime is the first-orderdifferentiation of V_(gtWi).

[0023] According to a sixth aspect, the characteristic evaluationapparatus of the second aspect is characterized in that the thresholdvoltage determination means determines the optimum second to fourthestimated values from a relational expression:${F\left( {\delta,V_{gtWi}} \right)} = {\frac{G_{m}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}{f^{\prime}\left( {\delta,V_{gtWi}} \right)} + {{DW}^{*}\left( {\delta,V_{gtWi}} \right)}}$

[0024] where δ is a difference between an estimated value of thethreshold voltage of the second transistor, i.e., a first estimatedvalue, and the threshold voltage of the first transistor; V_(gtWi) isthe first gate overdrive; G_(m)** is a value of a Y intercept that isobtained by extrapolating the characteristic curve; f is the slope ofthe characteristic curve at the virtual point; DW* is an X coordinatevalue at the virtual point; and a prime is the first-orderdifferentiation of V_(gtWi).

[0025] According to a seventh aspect, a characteristic evaluationapparatus for insulated gate type transistors in which at least twoinsulated gate type transistors that differ from each other only in maskchannel width are used for evaluation and the characteristic of a firstinsulated gate type transistor having a wide mask channel width servesas a reference, to evaluate the characteristic of a second insulatedgate type transistor having a narrow mask channel width. This apparatuscomprises: a threshold voltage estimation means that extracts thethreshold voltage of the first transistor, estimates the thresholdvoltage of the second transistor, and employs a value as estimated, as afirst estimated value; an extraction means in which (i) a differencebetween a gate voltage of the first transistor and the threshold voltageof the first transistor is defined as a first gate overdrive, and adifference between a gate voltage of the second transistor and the firstestimated value is defined as a second gate overdrive, (ii) in an X-Yplane whose X-axis is the mask channel width and Y-axis is source-drainconductance, a virtual point at which a change in Y coordinate value isestimated to be approximately zero when the first and second gateoverdrives are finely changed from a first characteristic curveexhibiting a relationship between the mask channel widths of the firstand second transistors and the source-drain conductance, and (iii) avalue of the X coordinate at the virtual point is employed as a secondestimated value, alternatively, as a value of the X intercept of thefirst characteristic curve; a threshold voltage determination means inwhich (i) from the second estimated value, an optimum first estimatedvalue is found with which a second characteristic curve exhibiting arelationship between the second gate overdrive and the second estimatedvalue in an X-Y plane whose X-axis is the second gate overdrive andY-axis is a value related to the second estimated value, has apredetermined shape within a predetermined range of the second gateoverdrive, and (ii) the optimum first estimated value is determined as atrue threshold voltage of the second transistor; and a channel narrowingdetermination means that determines a difference between the maskchannel width and an effective channel width, based on the truethreshold voltage.

[0026] According to an eighth aspect, the characteristic evaluationapparatus of the seventh aspect is characterized in that the extractionmeans further employs a value of the X intercept of the firstcharacteristic curve as a third estimated value; and the thresholdvoltage determination means employs a value that is obtained by reducingthe second estimated value from twice the third estimated value, as thevalue related to the second estimated value.

[0027] According to a ninth aspect, the characteristic evaluationapparatus of the eighth aspect is characterized in that the thresholdvoltage determination means employs the first estimated value with whicha value that is obtained by reducing the second estimated value fromtwice the third estimated value is best converged on a fixed value inthe predetermined range, as the optimum first estimated value.

[0028] According to a tenth aspect, the characteristic evaluationapparatus of the first aspect is characterized in that the channelnarrowing determination means determines a difference between the maskchannel width and an effective channel width, from a value that isobtained by reducing the second estimated value from twice the thirdestimated value when the gate overdrive is in the vicinity of 0 V.

[0029] According to an eleventh aspect, a characteristic evaluationapparatus for insulated gate type transistors in which at least twoinsulated gate type transistors that differ from each other only in maskchannel width are used for evaluation and the characteristic of a firstinsulated gate type transistor having a wide mask channel width servesas a reference, to evaluate the characteristic of a second insulatedgate type transistor having a narrow mask channel width. This apparatuscomprises: a threshold voltage estimation means that extracts athreshold voltage of the first transistor, estimates the thresholdvoltage of the second transistor, and employs a value as estimated, as afirst estimated value; an extraction means in which (i) a differencebetween a gate voltage of the first transistor and the extractedthreshold voltage of the first transistor is defined as a first gateoverdrive, and a difference between a gate voltage of the secondtransistor and the first estimated value is defined as a second gateoverdrive, (ii) under the condition that the first and second gateoverdrives are the same in an X-Y plane whose X-axis is the mask channelwidth and Y-axis is source-drain resistance, a virtual point at which achange in Y coordinate value is estimated to be approximately zero evenif the first and second gate overdrives are finely changed, is extractedfrom points on a straight line passing through a first point whose Xcoordinate is the mask channel width of the first transistor and Ycoordinate is the source-drain resistance of the second transistor, anda second point whose X coordinate is the mask channel width of thesecond transistor and Y coordinate is the source-drain resistance of thefirst transistor, (iii) values of the X coordinate and Y coordinate atthe virtual points are defined as second and third estimated values,respectively, and (iv) a slope of the straight line at the virtualpoints is extracted and a value of the slope is employed as a fourthestimated value; a threshold voltage determination means that determinesa true threshold voltage of the second transistor by using the first tofourth estimated values; and a channel narrowing determination meansthat determines a difference between the mask channel width and aneffective channel width, based on the true threshold voltage.

[0030] According to a twelfth aspect, in the characteristic evaluationapparatus of the eleventh aspect the threshold voltage determinationmeans is characterized in: (i) finding, from the second to fourthestimated values, optimum second to fourth estimated values with which achange of the third estimated value is equal to the product of a changeof the second estimated value and the fourth estimated value, in replyto fine changes of the first and second gate overdrives, (ii)determining an optimum first estimated value that corresponds to theoptimum second to fourth estimated values, and (iii) determining thetrue threshold voltage of the second transistor, based on the optimumfirst estimated value.

[0031] According to a thirteenth aspect, the characteristic evaluationapparatus of the twelfth aspect is characterized in that the thresholdvoltage determination means determines the optimum second to fourthestimated values from a relational expression:${F\left( {\delta,V_{gtWi}} \right)} = {{\frac{h^{2}\left( {\delta,V_{gtWi}} \right)}{h^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {{dW}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {R^{\#}\left( {\delta,V_{gtWi}} \right)}}$

[0032] where δ is a difference between an estimated value of thethreshold voltage of the second transistor, i.e., a first estimatedvalue, and the threshold voltage of the first transistor; V_(gtWi) isthe first gate overdrive; dW** is a value of an X intercept that isobtained by extrapolating the straight line; h is the slope of thestraight line; R^(#) is a Y coordinate value at the virtual point; and aprime is the first-order differentiation of V_(gtWi).

[0033] According to a fourteenth aspect, the characteristic evaluationapparatus of the twelfth aspect is characterized in that the thresholdvoltage determination means determines the optimum second to fourthestimated values from a relational expression:${F\left( {\delta,V_{gtWi}} \right)} = {{R^{**}\left( {\delta,V_{gtWi}} \right)} - {\frac{h\left( {\delta,V_{gtWi}} \right)}{h^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {R^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {R^{\#}\left( {\delta,V_{gtWi}} \right)}}$

[0034] where δ is a difference between an estimated value of thethreshold voltage of the second transistor, i.e., a first estimatedvalue, and the threshold voltage of the first transistor; V_(gtWi) isthe first gate overdrive; R** is a value of a Y intercept that isobtained by extrapolating the straight line; h is the slope of thestraight line; R^(#) is a Y coordinate value at the virtual point; and aprime is the first-order differentiation of V_(gtWi).

[0035] According to a fifteenth aspect, the characteristic evaluationapparatus of the twelfth aspect is characterized in that the thresholdvoltage determination means determines the optimum second to fourthestimated values from a relational expression:${F\left( {\delta,V_{gtWi}} \right)} = {\frac{R^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}{h^{\prime}\left( {\delta,V_{gtWi}} \right)} + {{DW}^{\#}\left( {\delta,V_{gtWi}} \right)}}$

[0036] where δ is a difference between an estimated value of thethreshold voltage of the second transistor, i.e., a first estimatedvalue, and the threshold voltage of the first transistor; V_(gtWi) isthe first gate overdrive; R** is a value of a Y intercept that isobtained by extrapolating the straight line; h is the slope of thestraight line; DW^(#) is an X coordinate value at the virtual point; anda prime is the first-order differentiation of V_(gtWi).

[0037] According to a sixteenth aspect, the characteristic evaluationapparatus of the twelfth aspect is characterized in that the thresholdvoltage determination means determines the optimum second to fourthestimated values from a relational expression:${F\left( {\delta,V_{gtWi}} \right)} = {{{dW}^{**}\left( {\delta,V_{gtWi}} \right)} + {\frac{h\left( {\delta,V_{gtWi}} \right)}{h^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {{dW}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {{DW}^{\#}\left( {\delta,V_{gtWi}} \right)}}$

[0038] where δ is a difference between an estimated value of thethreshold voltage of the second transistor, i.e., a first estimatedvalue, and the threshold voltage of the first transistor; V_(gtWi) isthe first gate overdrive; dW** is a value of an X intercept that isobtained by extrapolating the straight line; h is the slope of thestraight line; DW^(#) is an X coordinate value at the virtual point; anda prime is a first-order differentiation of V_(gtWi).

[0039] According to a seventeenth aspect, in the characteristicevaluation apparatus of the eleventh aspect the threshold voltagedetermination means is characterized in (i) finding, in an X-Y planewhose X-axis is the second gate overdrive and Y-axis is the secondestimated value, the optimum first estimated value with which acharacteristic curve exhibiting the relationship between the second gateoverdrive and the second estimated value has a predetermined shape in apredetermined range of the second gate overdrive, and (ii) determiningthe true threshold voltage of the second transistor, based on theoptimum first estimated value.

[0040] According to an eighteenth aspect, the characteristic evaluationapparatus of the seventeenth aspect is characterized in that thethreshold voltage determination means estimates, from the characteristiccurve in plural, an optimum characteristic curve with which the secondestimated value is best converged on a fixed value in the predeterminedrange.

[0041] According to a nineteenth aspect, the characteristic evaluationapparatus of the eleventh aspect is characterized in that the channelnarrowing determination means determines a difference between the maskchannel width and an effective channel width, from the second estimatedvalue when the gate overdrive is in the vicinity of 0 V.

[0042] The characteristic evaluation apparatus of the first or twelfthaspect allows accurate extraction of the threshold voltage of the secondinsulated gate type transistor, irrespective of the range of the secondgate overdrive, thereby improving the accuracy of effective channelwidth extraction.

[0043] The characteristic evaluation apparatus of the eleventh aspectfacilitates to determine the value of channel narrowing when the firstand second gate overdrives are in the vicinity of zero because thestationary point of the second estimated value is present in thevicinity of zero.

[0044] The characteristic evaluation apparatus of the second aspectfacilitates the slope extraction between virtual points because acharacteristic curve is approximated to a straight line. This allows tofind a virtual point as the intersection of straight lines, and theslope at an intersection as the slope of a straight line.

[0045] The characteristic evaluation apparatus of the third, fourth,fifth, sixth, thirteenth, fourteenth, fifteenth or sixteenth aspectrequires no differentiation of the gate overdrive at a virtual point,thereby reducing errors.

[0046] The characteristic evaluation apparatus of the seventh, eighth orseventeenth aspect facilitates to determine true threshold voltagesbecause the second characteristic curves that are obtained for the truethreshold voltage on a graph may approximately coincide, irrespective ofmask channel width.

[0047] The characteristic evaluation apparatus of the ninth oreighteenth aspect facilitates programming for appropriate results bydetecting an optimum characteristic curve exhibiting the bestconvergence on a fixed value.

[0048] The characteristic evaluation apparatus of the tenth ornineteenth aspect facilitates channel narrowing determination becausethe channel narrowing at the gate overdrive of 0 V is determined byusing a value that is obtained by reducing the second estimated valuefrom twice the third estimated value, alternatively, because the secondestimated value has a stationary point when the gate overdrive is in thevicinity of 0 V.

[0049] To solve the above problem, it is an object of the presentinvention to obtain a characteristic evaluation apparatus for insulatinggate type transistors which performs evaluation of insulated gate typetransistors by using a characteristic evaluation method for insulatedgate type transistors which reduces the error due to the uncertainty ofa threshold voltage to permit channel narrowing extraction of highaccuracy.

[0050] It is another object of the present invention to obtain acomputer readable storing medium that stores a characteristic evaluationprogram.

[0051] It is another object of the present invention to obtain amanufacturing method by which insulated gate type transistors havingexcellent characteristics can be manufactured easily by using the abovecharacteristic evaluation method.

[0052] These and other objects, features, aspects and advantages of thepresent invention will become more apparent from the following detaileddescription of the present invention when taken in conjunction with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0053]FIG. 1 is a graph for explaining an effective channel lengthextraction by Chia method;

[0054]FIG. 2 is a graph for explaining threshold voltage extraction;

[0055]FIG. 3 is a graph for explaining a virtual point, G_(m) interceptand W_(m) intercept in Gm method;

[0056]FIG. 4 is a flowchart giving an example of the procedure of acharacteristic evaluation method for insulated gate type transistorsaccording to a first preferred embodiment of the present invention;

[0057]FIG. 5 is a graph for explaining a true shift amount determinationaccording to the first preferred embodiment;

[0058]FIG. 6 is a graph for explaining the relationship between channelnarrowing and W_(m) coordinate at a virtual point;

[0059]FIG. 7 is a diagram for explaining a higher-order narrowing;

[0060]FIG. 8 is a block diagram giving an example of the construction ofa characteristic evaluation apparatus for insulated gate typetransistors according to the first preferred embodiment;

[0061]FIG. 9 is a conceptual diagram showing the concept in which acalculation section in FIG. 8 is implemented by a computer;

[0062]FIG. 10 is a flowchart showing the manufacturing steps forinsulated gate type transistors which employs the characteristicevaluation method of the first preferred embodiment;

[0063]FIG. 11 is a graph showing the relationship between mask channellength and effective channel length in manufacturing an insulated gatetype transistor;

[0064]FIG. 12 is a graph showing the relationship between effectivechannel length and threshold voltage in manufacturing an insulated gatetype transistor;

[0065]FIG. 13 is a graph for explaining the outline of a secondpreferred embodiment of the present invention;

[0066]FIG. 14 is a graph showing the relationship between W_(m)coordinate at a virtual point and threshold voltage error;

[0067]FIG. 15 is a graph for explaining the relationship between W_(m)intercept and threshold voltage error;

[0068]FIG. 16 is a graph for explaining the relationship between a valuethat is obtained by reducing the value of W_(m) coordinate at a virtualpoint from twice the value of W_(m) intercept, and threshold voltageerror;

[0069]FIG. 17 is a flowchart giving an example of the procedure of acharacteristic evaluation method for insulated gate type transistorsaccording to the second preferred embodiment;

[0070]FIG. 18 is a block diagram giving an example of the constructionof a characteristic evaluation apparatus for insulated gate typetransistors according to the second preferred embodiment;

[0071]FIG. 19 is a graph for explaining a virtual point, R intercept andW_(m) intercept in Rm method;

[0072]FIG. 20 is a flowchart giving an example of the procedure of acharacteristic evaluation method for insulated gate type transistorsaccording to a third preferred embodiment;

[0073]FIG. 21 is a graph for explaining a true shift amountdetermination according to the third preferred embodiment;

[0074]FIG. 22 is a graph for explaining the relationship between channelnarrowing and W_(m) coordinate at a virtual point;

[0075]FIG. 23 is a block diagram giving an example of the constructionof a characteristic evaluation apparatus for insulated gate typetransistors according to the third preferred embodiment;

[0076]FIG. 24 is a graph for explaining the outline of a fourthpreferred embodiment;

[0077]FIG. 25 is a graph showing the relationship between W_(m)coordinate at a virtual point and threshold voltage error;

[0078]FIG. 26 is a flowchart giving an example of the procedure of acharacteristic evaluation method for insulated gate type transistorsaccording to the fourth preferred embodiment;

[0079]FIG. 27 is a block diagram giving an example of the constructionof a characteristic evaluation apparatus for insulated gate typetransistors according to the fourth preferred embodiment;

[0080]FIG. 28 is a graph for explaining the difference between thechannel narrowing obtained by prior art characteristic evaluation methodand the channel narrowing obtained by the characteristic evaluationmethod of the first or third preferred embodiment; and

[0081]FIG. 29 is a graph showing the relationship between gate overdrivearea set for calculation in the characteristic evaluation method of thefirst or third preferred embodiment, and channel narrowing.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0082] First Preferred Embodiment

[0083] A characteristic evaluation method for insulated gate typetransistors according to a first preferred embodiment will be describedhereafter. In this method, a channel narrowing DW is extracted by usingthe drain current in the linear areas of a plurality of transistors,each having the same mask channel length L_(m) and a different maskchannel width W_(m).

[0084] The above characteristic evaluation method will be roughed out.Firstly there are prepared at least two MOS transistors, each having thesame channel length L_(m) and a different mask channel width W_(m). Inthe following description, the number of MOS transistors is limited totwo. Of the two MOS transistors, one having a wide mask channel widthW_(m) is referred to as a wide transistor or first insulated gate typetransistor, and the other having a narrow mask channel width W_(m) isreferred to as a narrow transistor or second insulated gate typetransistor. Subscript Wi in symbols stands for being concerned with thewide transistor, and subscript Na stands for being concerned with thenarrow transistor. In the prior art method that is described byreferring to FIG. 2, the threshold voltages V_(thWi), V_(thNa) of thewide transistor and narrow transistor, respectively, are extrapolatedfrom I_(ds)−V_(gs) characteristic or the like. The threshold voltageV_(thNa) of the second insulated gate type transistor thus obtained is afirst estimated value. By changing the threshold voltage V_(thNa) of thenarrow transistor (the first estimated value) with the threshold voltageV_(thWi) of the wide transistor fixed, a coordinate (DW*, G_(m)*) at avirtual point at which the change in source-drain conductance isestimated to be approximately zero even if a gate overdrive V_(gt) isfinely changed against each of the changed threshold voltage V_(thNa),is extracted from, for example, the intersection coordinates of aplurality of characteristic curves having a different gate overdriveV_(gt). In this case, the gate overdrive V_(gt) of the wide transistoris a first gate overdrive, and the gate overdrive V_(gt) of the narrowtransistor is a second gate overdrive. The coordinate DW*, coordinateG_(m)* and slope f at the virtual point are second, third and fourthestimated values, respectively.

[0085] Then, by using the threshold voltages V_(thWi) and V_(thNa), thecoordinate (DW*, G_(m)*) at the virtual point is extracted from therelationship between conductance G_(m) and mask channel width W_(m).Examples of this method is, as shown in FIG. 3 in prior art, one inwhich two characteristic curves (straight lines) representing thecharacteristic G_(m)−W_(m) are drawn in a graph whose X-axis is maskchannel width W_(m) and Y-axis is source-drain conductance G_(m), andthe intersection of the two straight lines is found to extract a virtualpoint. In FIG. 3, the straight line expressing the gate overdrive V_(gt)is a first straight line, the point that satisfies the mask channelwidth W_(m)=W_(mWi) on the first straight line is a first point, and thepoint that satisfies the mask channel width W_(m)=W_(mNa) on the firststraight line is a second point. However, the estimation of thecoordinate at a virtual point is not limited to the above. Instead of astraight line passing through two points, a curve to be determined bythree or more points may be used. Alternatively, a point in the vicinityof an intersection may be used instead of the intersection. From amongthe values of a coordinate (DW*, G_(m)*) which express the extractedvirtual point, there is determined the value with which the change inthe value G_(m) of the Y component of the coordinate expressing avirtual point is estimated to be equal to the product of the change ofthe value DW* of the X component of the virtual point and the channelresistance value f per unit width.

[0086] Extraction of an effective channel width W_(eff) in MOStransistors will be described in detail by referring to FIG. 4.

[0087] Firstly, the I_(ds)−V_(gs) characteristics of two transistors Wiand Na, each having the same mask channel length L_(m) and a differentmask channel width W_(m), are measured (step ST1.1).

[0088] From the obtained I_(ds)−V_(gs) characteristics, the thresholdvoltages V_(thWi) of a wide transistor and V_(thNa) of a narrowtransistor are extracted by using extrapolation method or the like (stepST1.2). Then, the difference (V_(thNa)−V_(thWi)) between the thresholdvoltages V_(thWi) and V_(thNa) is found. Hereafter, the difference(V_(thNa)−V_(thWi)) thus found is defined as δ_(guess).

[0089] The lower and upper limits of an area in which the value δ to beset as a threshold voltage difference is changed are determined asδ_(inf)=δ_(guess)−K and δ_(sup)=δ_(guess)+K, respectively (step ST1.3).Here, let K be 0.2 V, and δ=δ_(inf) is set as an initial value.

[0090] Then, it is determined whether the value δ to be calculated ispresent between δ_(inf) and δ_(sup) (step ST1.4). That is, it isdetermined whether δ_(inf)≦δ≦δ_(sup).

[0091] When the value δ is present between δ_(inf) and δ_(sup), thethreshold voltage V_(thWi) of the wide transistor is fixed to the valuethat has been extracted in step ST1.2, and the threshold voltageV_(thNa) of the narrow transistor is supposed to be the sum of thethreshold voltage V_(thWi) of the wide transistor and the δ (stepST1.5).

[0092] On the basis of the threshold voltage V_(thWi) and V_(thWi)+δ instep ST1.5, a gate overdrive V_(gt) is measured. For about 20 points ina certain area Ω, e.g., in the range of the gate overdrive V_(gt)satisfying 0.3 V≦V_(gt)≦1.3 V, there are found the rate of change DW*′(δ, V_(gtn)) in the value of W_(m) coordinate at a virtual point, therate of change G_(m)*′ (δ, V_(gtn)) in the value of G_(m) coordinate ata virtual point, and the conductance f (δ, V_(gtn)) per unit width. Fromthe values thus found, the value of function F(δ, V_(gtn)) expressed byEquation 6 is found.

F(δ, V _(gtn))=G _(m) *′−f·DW*′  (Eq. 6)

[0093] where n=1, 2, . . . 20.

[0094] Next, the standard deviation of function F, σ[F(δ)], iscalculated in the area Ω (step ST1.7). By substituting δ+Q for δ, thevalue of a shift amount δ is changed to return to step ST1.4 (stepST1.8). Let the value of Q be 0.01, for example.

[0095] When it is determined δ_(inf)≦δ≦δ_(sup) in step ST1.4, stepsST1.5 to ST1.8 are repeated. On the other hand, when it is notdetermined δ_(inf)≦δ≦δ_(sup) in step ST1.4, it goes to step ST1.9 andfind δ=δ₀, with which the standard deviation σ [F(δ)] becomes a minimum.At that time, the true threshold voltage V_(thNa) of the narrowtransistor is given by the sum of the threshold voltage V_(thWi) of thewide transistor and the δ₀ that has been determined in step ST1.9.

[0096] Using the true threshold voltage V_(thWi)+δ₀ of the narrowtransistor that has been determined in step ST1.9, the gate overdriveV_(gt) of the narrow transistor is measured to find the valueDW*(V_(gt)) of W_(m) coordinate at a virtual point (step ST1.10). Thethreshold voltage V_(thWi) of the wide transistor at that time is basedon the value that has been found in step ST1.2, as in step ST1.5.

[0097] Let the channel narrowing DW_(Na) of the narrow transistor beDW_(Na)(V_(gt))=dW**(V_(gt)), where dW** is an optimum second estimatedvalue (step ST1.11). At the same time an effective channel widthW_(effNa) is given by the following Equation 7. Here at, G_(m)* that isobtained by using a gate overdrive V_(gt) providing a channel narrowingDW is an optimum third estimated value. Further, an optimum fourthestimated value is the conductance f of the channel per unit width whichis obtained by using a gate overdrive V_(gt) providing a channelnarrowing DW.

W _(effNa)(V _(gt))=W _(mNa) −DW _(Na)(V _(gt))   (Eq.7)

[0098] Although in step ST1.11, the channel narrowing DW_(Na) isdetermined from dW**, the channel narrowing DW(V_(gt)) when a gateoverdrive V_(gt) is in the vicinity of zero may be determined as a value(2·dW**−DW*), which is given from W_(m) coordinate at an intersectionand W_(m) intercept. In this case, when the gate overdrive V_(gt) is inthe vicinity of zero, the change of (2·dW**−DW*) against the change ofgate overdrive V_(gt) is extremely small, thus making it easy todetermine a channel narrowing DW_(Na).

[0099] Description will be now given of a concrete procedure todetermine a channel narrowing DW and the like, from the standarddeviation of the function F shown in Equation 6. In a characteristicevaluation method for insulated gate type transistors according to thefirst preferred embodiment, to reduce the uncertainty of thresholdvoltage extrapolation and, in particular, the error due to theuncertainty of threshold voltage extrapolation for transistors having anarrow channel width, the relationship of Equation 8 which is, forexample, established between the value DW* of W_(m) coordinate at avirtual point and the value dW**, is noted to apply a variation method.Here, dW** is the value of X intercept that is obtained by extrapolatinga G_(m)−W_(m) characteristic curve (straight line) which is plottedbetween source-drain conductance G_(m) and mask channel width W_(m), byusing G_(m) to enter a Y-axis and W_(m) to enter an X-axis. Hereinafter,dW** may be taken to represent the value of W_(m) intercept.$\begin{matrix}{{{dW}^{**} + {\frac{f}{f^{\prime}}{dW}^{**^{\prime}{- {DW}^{*}}}}} = 0} & \left( {{Eq}.\quad 8} \right)\end{matrix}$

[0100] Supposing that the threshold voltage difference between thenarrow transistor and the wide transistor is a shift amount δ, the valueDW* of W_(m) coordinate at a virtual point, the value dW** of W_(m)intercept and its rate of change dW**′, as well as the channelconductance f per unit width and its rate of change f′, are found fromG_(mNa)(V_(gtWi)+δ−V_(thNa)+V_(thWi)) and G_(mWi)(V_(gtWi)). When ashift amount δ is equal to the true threshold voltage difference δ₀between the narrow transistor and the wide transistor, Equation 8 issatisfied. At that time, dW** gives a channel narrowing DW. Therefore, achannel narrowing DW can be extracted through the following procedure.

[0101] Firstly, with respect to a certain shift amount δ, the value DW*of W_(m) coordinate at a virtual point, the value dW** of W_(m)intercept, and the channel conductance f per unit width are given byEquations 9 to 11. $\begin{matrix}{{DW}^{*} = \frac{W_{mNa} - {{ri} \cdot W_{mWi}}}{\left( {1 - {ri}} \right)}} & \left( {{Eq}.\quad 9} \right) \\{{dW}^{**} = \frac{W_{mNa} - {{rai} \cdot W_{mWi}}}{\left( {1 - {rai}} \right)}} & \left( {{Eq}.\quad 10} \right) \\{{f\left( {V_{gtWi},\delta} \right)} = \frac{{G_{mWi}\left( V_{gtWi} \right)} - {G_{mNa}\left( {V_{thWi} + \delta - V_{gtNa} + V_{thWi}} \right)}}{W_{mWi} - W_{mNa}}} & \left( {{Eq}.\quad 11} \right)\end{matrix}$

[0102] In Equations 9 to 11, parameters ri and rai are defined by thefollowing Equations 12 and 13, respectively, and V_(gtWi) denotes a gateoverdrive on the basis of the threshold voltage V_(thWi) of a widetransistor having a wide mask channel width W_(mWi). $\begin{matrix}{{{ri}\left( {V_{gtwi},\delta} \right)} \equiv \frac{{G_{mNa}}^{\prime}\left( {V_{gtWi} + \delta - V_{thNa} + V_{thWi}} \right)}{{G_{mWi}}^{\prime}\left( V_{gtWi} \right)}} & \left( {{Eq}.\quad 12} \right)\end{matrix}$

$\begin{matrix}{{{rai}\left( {V_{gtwi},\delta} \right)} \equiv \frac{G_{mNa}\left( {V_{gtwi} + \delta - V_{thNa} + V_{thWi}} \right)}{G_{mWi}\left( V_{gtWi} \right)}} & \left( {{Eq}.\quad 13} \right)\end{matrix}$

[0103] The value DW* of W_(m) coordinate at a virtual point, the valuedW** of W_(m) intercept and its rate of change dW**′, as well as thechannel conductance f per unit width and its rate of change f′, arefound by changing a shift amount δ.

[0104] The function F in Equation 6 can be modified to redefine as thefollowing Equation 14, making it easy to find the function F. When ashift amount δ is equal to a threshold voltage difference δ₀ between thenarrow transistor and the wide transistor, the function F defined inEquation 14 becomes zero, irrespective of a gate overdrive V_(gtWi).Then, a shift amount δ with which the standard deviation of function Fin an area of gate overdrive V_(gtWi) becomes a minimum, is determinedas a true threshold voltage difference δ₀. $\begin{matrix}{{F\left( {V_{gtWi},\delta} \right)} = {{{dW}^{**}\left( {V_{gtWi},\delta} \right)} + {\frac{f\left( {V_{gtWi},\delta} \right)}{f^{\prime}\left( {V_{gtWi},\delta} \right)} \cdot {{dW}^{**^{\prime}}\left( {V_{gtWi},\delta} \right)}} - {{DW}^{*}\left( {V_{gtWi},\delta} \right)}}} & \left( {{Eq}.\quad 14} \right)\end{matrix}$

[0105]FIG. 5 is a graph showing one example of the relationship betweenthe standard deviation of function F and shift amount δ. In this graph,a minimum value is obtained when the shift amount δ is −0.06 V, thus leta true threshold voltage difference δ₀ be −0.06 V.

[0106] The value of a channel narrowing DW is determined by using thevalue of the above threshold voltage difference δ₀. For instance, it maybe determined in the same manner as in step ST1.11 of FIG. 4.Alternatively, the average of values obtained when the gate overdriveV_(gt) is in the vicinity of zero, among the values DW* (δ₀, V_(gt)) ofW_(m) coordinate at a virtual point, may be taken as the value of achannel narrowing DW. FIG. 6 gives an example of the results when thecharacteristic evaluation method of MOS transistors according to thefirst preferred embodiment (hereinafter referred to as Gm method) isapplied to a process.

[0107] Instead of Equation 14 that is used in the first preferredembodiment, any one of Equations 15 to 17 may be used to find functionF. $\begin{matrix}{{F\left( {\delta,V_{gtWi}} \right)} = {{\frac{f^{2}\left( {\delta,V_{gtWi}} \right)}{f^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {{dW}^{**}\left( {\delta,V_{gtWi}} \right)}} - {G_{m}^{*}\left( {\delta,V_{gtWi}} \right)}}} & \left( {{Eq}.\quad 15} \right) \\{{F\left( {\delta,V_{gtWi}} \right)} = {{G_{m}^{**}\left( {\delta,V_{gtWi}} \right)} - {\frac{f\left( {\delta,V_{gtWi}} \right)}{f^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {G_{m}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {G_{m}^{*}\left( {\delta,V_{gtWi}} \right)}}} & \left( {{Eq}.\quad 16} \right) \\{{F\left( {\delta,V_{gtWi}} \right)} = {\frac{G_{m}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}{f^{\prime}\left( {\delta,V_{gtWi}} \right)} + {{DW}^{*}\left( {\delta,V_{gtWi}} \right)}}} & \left( {{Eq}.\quad 17} \right)\end{matrix}$

[0108] In Equations 16 and 17, G_(m)** is the value of a R interceptthat is obtained by extrapolating G_(m)−W_(m) characteristic. Thus, byusing mask channel width W_(m) to enter the X-axis and source-drainconductance G_(m) to enter the Y-axis, without using any coordinate at avirtual point, a G_(m)−W_(m) characteristic curve (straight line) isextrapolated to obtain the value G_(m)** of a Y intercept and the valuedW** of a Y intercept which are found as X=0 and Y=0, respectively. Theuse of the value G_(m)** or dW** requires no differentiation of thecoordinate (DW*, R*) at a virtual point. The accuracy is unchanged byusing any one of Equations 14 to 17. Equation 15 and 16, however, callfor calculation of G_(m)**. Hence, Equation 14 or 17 is preferred.

[0109] Although in the first preferred embodiment, a shift amount δ isdetermined by a value with which the standard deviation of function Fbecomes a minimum, it can be determined by a value with which theaverage value of functions F approaches zero, or the minimum value ofthe sum of squares (ΣF²) of function F. The above alternatives, however,might have the errors due to the offset of the value of function F,which are caused by calculation errors, unlike the value with which thestandard deviation becomes a minimum.

[0110] Moreover, the first preferred embodiment employsG_(mNa)′/G_(mWi)′ in Equation 12, for example, to improve calculationaccuracy in finding the value DW* of W_(m) coordinate at a virtualpoint. On the other hand, if easy process is desired, a higher accuracycalculation than prior art is attainable by using δG_(mNa)/δG_(mWi),instead of G_(mNa)′/G_(mWi)′. High-accuracy channel narrowing DWextraction is also attainable by high-accuracy calculation of the changein the source-drain conductance G_(m) of a wide transistor or narrowtransistor, by means of a higher-order approximate expression. Forinstance, the slope of a curve at y₀ among points that are equallyspaced with a width s, as shown in FIG. 7, can be given by ahigher-order approximate expression in the following Equation 18.$\begin{matrix}{y_{0}^{\prime} = {\frac{1}{12 \cdot h}\left( {y_{- 2} - {8 \cdot y_{- 1}} + {8 \cdot y_{1}} - y_{2}} \right)}} & \left( {{Eq}.\quad 18} \right)\end{matrix}$

[0111] The use of the characteristic evaluation method for insulatedgate type transistors in the first preferred embodiment permitsevaluation at higher accuracy than prior art. As a result, improvementof accuracy owing to use of G_(mNa)′/G_(mWi)′ is satisfactorilyreflected on evaluation results than prior art.

[0112] In the calculation of G_(mNa)′/G_(mWi)′ by Gm method, to reduceerrors, resistance R is sometimes used instead of conductance G_(m), asshown in Equation 19. The reason for using the differentiation of thelogarithm of resistance R is to reduce the error due to a great changein resistance R when V_(gt) is brought near zero. $\begin{matrix}{\frac{G_{mNa}^{\prime}}{G_{mWi}^{\prime}} = {\frac{\left( {1/R_{Na}} \right)^{\prime}}{\left( {1/R_{Wi}} \right)^{\prime}} = {{\frac{R_{Na}^{\prime}}{R_{Wi}^{\prime}} \cdot \frac{R_{Wi}^{2}}{R_{Na}^{2}}} = {\frac{\left( {\quad {nR}_{Na}} \right)^{\prime}}{\left( {\quad {nR}_{Wi}} \right)^{\prime}} \cdot \frac{R_{Wi}}{R_{Na}}}}}} & \left( {{Eq}.\quad 19} \right)\end{matrix}$

[0113] Description will be now given of a characteristic evaluationapparatus for insulated gate type transistors according to the firstpreferred embodiment, by referring to FIG. 8. A characteristicevaluation apparatus for insulated gate type transistors 1 is connectedto a measuring device 3 for measuring an object under test 2. Examplesof the object under test 2 are integrated circuits in which a widetransistor and a narrow transistor are formed. Such an integratedcircuit after being extracted from the lot for which all manufacturingsteps have been terminated, is set to the measuring device 3 to makemeasurement therefor. The measuring device 3 is controlled by a controlsection 4 of the characteristic evaluation apparatus 1. An input section5 provides the control section 4 with control information. The inputsection 5 is composed of a keyboard, a mouse and the like. Measurementdata obtained in the measuring device 3 is inputted to a calculationsection 6 together with the control information, through the controlsection 4. The calculation section 6 extracts an effective channel widthW_(eff), based on the data to be inputted from the input section 5. Anoutput section 7 outputs the extracted effective channel width W_(eff)and the control information used in the middle of extraction. Suchcontrol information is provided from the control section 4 orcalculation section 5.

[0114] The calculation section 6 is composed of a threshold voltage andvirtual shift amount determination section 11 that determines thresholdvoltages V_(thWi), V_(thNa), and virtual shift amount δ; an extractionsection 12 that extracts an intersection coordinate (DW*, G_(m)*) as thecoordinate at a virtual point, and the slope f of a characteristic curveat the intersection coordinate; a true shift amount determinationsection 13 for determining a true shift amount δ₀, and a channelnarrowing determination section 14 for determining channel narrowing DW(or an effective channel width W_(eff)). Although in this embodiment, anintersection coordinate is used as the coordinate at a virtual point atwhich the change of source-drain conductance G_(m) is supposed to beapproximately zero even if the gate overdrive V_(gt) is finely changedin a W_(m)−G_(m) characteristic curve. The intersection coordinate maybe found by other than the method of finding an intersection,alternatively, other point may be used as the coordinate at a virtualpoint, as previously discussed. For executing calculation in thecalculation section 6, the value of a variable K for determining theupper limit δ_(sup) and lower limit δ_(inf) in the range of changing ashift amount δ, the range of area Ω in which a gate overdrive V_(gt) ismeasured, and the quantity of change Q of a virtual shift amount δ, areinputted to the threshold voltage and virtual shift amount determinationsection 11 from the input section 5. The measurement data ofsource-drain current I_(ds) and gate-source voltage V_(gt) are providedto the threshold voltage and virtual shift amount determination section11, from the control section 4. The determination section 11 receivesthe above data, and then provides the extraction section 12 with thethreshold voltage V_(thWi) of a wide transistor and a virtual shiftamount δ that indicates the difference between this threshold voltageV_(thWi) and the threshold voltage V_(thNa) of a narrow transistor. Inthe extraction section 12, with respect to each shift amount δ, the rateof change dDW*/dV_(gt) and that of dG_(m)/dV_(gt) for an intersectioncoordinate (DW*, G_(m)*) in an area Ω, and the slope f of acharacteristic curve are extracted by using the value of the maskchannel width W_(m) provided from the input section 5, as well as thesource-drain current I_(ds) and the measurement data of gate-sourcevoltage V_(gt). From the rate of change dDW*/dV_(gt) of W_(m) coordinateof the intersection, the rate of change dG_(m)/dV_(gt) of R coordinateof the intersection, and the slope f of the characteristic curve whichhave been extracted in the extraction section 12, the true shift amountdetermination section 13 determines a virtual shift amount δ₀ with whichthe standard deviation of the function F expressed in Equation 6 becomesa minimum in an area Ω. Upon determination of a virtual shift amount δ₀,the extraction section 12 outputs the virtual shift amount δ₀ and thevalue DW* of W_(m) coordinate of the corresponding intersection or thevalue dW** of W_(m) intercept, to a channel narrowing determinationsection 14. In the section 14, a channel narrowing DW is determined fromthe value dW** of W_(m) intercept or the value DW* of W_(m) coordinateat a virtual point, and the calculation expressed in Equation 7 iscarried out to determine an effective channel width W_(eff). The outputsection 7 outputs the channel narrowing DW and the effective channelwidth W_(eff) determined in the channel narrowing determination section14, the intersection coordinate (DW*, G_(m)*) and the slope of acharacteristic curve at the intersection coordinate extracted in theextraction section 12, and the true shift amount δ₀ determined in thetrue shift amount determination section 13.

[0115] With the above construction, it is possible to obtain acharacteristic evaluation apparatus for insulated gate type transistorswhich extracts an effective channel width W_(eff) at a higher accuracythan prior art.

[0116] Referring to FIG. 9, the characteristic evaluation for insulatedgate type transistors as described in the first preferred embodiment canbe realized by making a computer to read an evaluation program 30 forevaluating insulated gate type transistors from a recording mediumstoring the program 30, in accordance with the procedure in FIG. 4 asdescribed in the first preferred embodiment. By executing the evaluationprogram 30, a measurement data 33 containing data related to aneffective channel width W_(eff) can be extracted on the basis of ameasurement data 31 provided from a measuring device 3 and a controlinformation 32 from an input section 5 in FIG. 8, as described in thefirst preferred embodiment.

[0117] Description will be now given of a method of manufacturing aninsulated gate type transistor according to the first preferredembodiment, by referring to FIG. 10. Firstly, a target narrow transistorand a reference wide transistor are prepared (step ST50). Then, theelectrical characteristics of both transistors are measured (step ST51).In this step, the I_(ds)−V_(gs) characteristic, off leak current I_(off)and drain current I_(dmax) of each transistor are measured. The off leakcurrent I_(off) is the current that flows between source and drain when,for example, V_(ds)=VDD and V_(gs)=V_(bs)=0 V, where VDD is power supplyvoltage.

[0118] By the characteristic evaluation method for insulated gate typetransistors as described in the first preferred embodiment, thethreshold voltage V_(thNa) and effective channel width W_(effNa) of thenarrow transistor are extracted from I_(ds)−V_(gs) characteristic or thelike. Then, it is determined whether the threshold voltage V_(thNa),effective channel width W_(effNa), current I_(dmax), and current I_(off)of the narrow transistor satisfy a specification (step ST53). If not, itreturns to step ST50 to perform another preparation of transistors byusing a new mask.

[0119] Thus, the characteristic evaluation method for insulated gatetype transistors according to the first preferred embodiment producesthe following effects. Firstly, since the threshold voltage isdetermined accurately from a known mask channel width and electricalcharacteristics, the time required for manufacturing is reduced,compared to the case where the section of an insulated gate typetransistor is observed with an electron microscope or the like.Secondly, in response to a gate overdrive V_(gt), the range of aneffective channel width W_(eff) in the desired mask channel width W_(m)is found accurately (see FIG. 11). Thirdly, the variable range of thethreshold voltage V_(th) that corresponds to the variable range of aneffective channel width W_(eff) is found accurately at the same time(see FIG. 12), thus facilitating the quality control of the thresholdvoltage V_(th) in manufacturing steps.

[0120] Second Preferred Embodiment

[0121] Description will be given of the outline of a characteristicevaluation method for insulated gate type transistors according to asecond preferred embodiment, by referring to FIG. 13. FIG. 13 is a graphshowing the relationship between the value of (2·dW**−DW*) and gateoverdrive V_(gt) which are obtained by the characteristic evaluationmethod for insulated gate type transistors according to the secondpreferred embodiment. Specifically, this graph shows the change in thevalue of (2·dW**−DW*) when a true threshold voltage is used for threenarrow transistors which differ one another in mask channel widthW_(mNa). Note that the mask channel width W_(mWi) of a wide transistorwhich serves as a reference in extracting the values dW** and DW* ofW_(m) coordinate of these narrow transistors, is set to the same value.A comparison of FIG. 13 with FIGS. 14 to 16 indicates that when used atrue threshold voltage, the change in the value of (2·dW**−DW*) againstthe gate overdrive V_(gt) is approximately the same, irrespective of themask channel widths W_(mNa) of the narrow transistors. Therefore, thetrue threshold voltage of a narrow transistor can be extracted byfinding out one which coincides with the characteristic curve of thisgraph when the value of a gate overdrive V_(gt) is, for example, in therange of 0.3-1.2 V. In the second preferred embodiment, first and secondinsulated gate type transistors, first and second gate overdrives, andfirst and second estimated values, are also defined as in the firstpreferred embodiment.

[0122] Description will be now given of an example of a characteristicevaluation method for insulated gate type transistors according to thesecond preferred embodiment. In this method, the characteristic curve ofFIG. 13 is extracted from characteristic curves that change variouslydepending on the estimated value of the threshold voltage V_(thNa) of anarrow transistor, namely, a first estimated value, by making use of thefact that the standard deviations of the characteristic curves are smallin the range of 0.2-0.6 V, for example. Since in this method the truethreshold voltage of a narrow transistor is determined by utilizing thedependence of (2·dW**−DW*) on a gate overdrive V_(gt), it is determinedin a procedure similar to that of the first preferred embodiment.

[0123] One example of the extraction procedure of an effective channelwidth W_(eff) in the second preferred embodiment is given in FIG. 17.The extraction procedure of the second preferred embodiment is differentfrom that of the first preferred embodiment in steps ST1.12, ST1.13 andST1.14 to ST1.16 in FIG. 17, which correspond to steps ST1.6, ST1.7 andST1.9 to ST1.11 in FIG. 4, respectively.

[0124] In step ST1.12, the value of 2·dW**−DW* against, for example,about 20 different gate overdrives V_(gtn) are found by using the valuesof W_(m) coordinate and W_(m) intercept. In step ST1.13, there arecalculated the average value <2·dW**−DW*> and standard deviationσ[2·dW**−DW*] of a value that is obtained by reducing the value DW* ofW_(m) coordinate at a virtual point from twice of the value dW** ofW_(m) intercept for a shift amount δ.

[0125] When it is judged that in step ST1.13, the calculation of a shiftamount δ in a predetermined range of δ_(inf) to δ_(sup) is terminated(step ST1.4), a true shift amount δ₀ that gives a channel narrowing DWis estimated in step ST1.14. The true shift amount δ₀ is a shift amountδ₀ with which a standard deviation σ[2·dW**−DW*] becomes a minimum. Thismeans that the choice of a characteristic curve whose values are bestconverged on a fixed value. In step ST1.15, a channel narrowing DW isgiven by, for example, the average of the values DW* of W_(m) coordinateat a virtual point for a shift amount δ₀. In step ST1.16, an effectivechannel width W_(eff) is determined from the difference between a maskchannel width W_(m) and the channel narrowing DW.

[0126] Referring to FIG. 18, a characteristic evaluation apparatus forinsulated gate type transistors according to the second preferredembodiment will be described. A characteristic evaluation apparatus forinsulated gate type transistors 1A shown in FIG. 18 is connected to ameasuring device 3 for measuring an object under test 2, like thecharacteristic evaluation apparatus 1 of the first preferred embodimentas shown in FIG. 8. In the construction of the characteristic evaluationapparatus 1A, the same reference numerals have been retained for similarparts which have the same functions as in the apparatus 1 of FIG. 8.That is, the characteristic evaluation apparatus 1A has the samestructure as the apparatus 1, except for an extraction section 12A, atrue shift amount determination section 13A and a channel narrowingdetermination section 14A in a calculation section 6A. The extractionsection 12A finds (2·dW**−DW*) by changing a gate overdrive V_(gt) in anarea Ω. In the true shift amount determination section 13A, a value withwhich the standard deviation σ[2·dW**−DW*] becomes a minimum, is foundfrom the value DW* of W_(m) coordinate of an intersection and the valuedW* of W_(m) intercept in the area Ω, to determine a true shift amountδ₀. The extraction section 12A outputs the true shift amount δ₀ and thevalue DW* of W_(m) coordinate of the corresponding intersection or thevalue dW* of W_(m) intercept, to the channel narrowing determinationsection 14A. The section 14A determines a channel narrowing DW from theaverage of (2·dW**−DW*) when the gate overdrive V_(gt) is in thevicinity of 0 V, e.g., in the range of 0.2≦V_(gt)≦0.6, in an area Ω fora true shift amount δ₀, alternatively, from the value dW** of W_(m)intercept. In the second preferred embodiment, a value with which thestandard deviation σ[2·dW**−DW*] of the value (2·dW**−DW*) becomes aminimum, or a value with which the standard deviation σ[dW**] of thevalue dW** of W_(m) intercept becomes a minimum, is determined as achannel narrowing DW. Its determination method is, however, not limitedto the above, and the threshold voltage V_(thNa) of a narrow transistormay be determined by selecting a characteristic curve in which the valuedW** of W_(m) intercept or the value of (2·dW**−DW*) is best convergedon a fixed value when a gate overdrive V_(gt) is within a predeterminedrange.

[0127] A method of manufacturing an insulted gate type transistoraccording to the second preferred embodiment can be implemented byemploying, in step ST52 shown in FIG. 10, the evaluation method of thesecond preferred embodiment in place of that of the first preferredembodiment. This results in the same effects as in the case where theevaluation method of the first preferred embodiment is applied to amanufacturing method.

[0128] Referring again to FIG. 9, the characteristic evaluation forinsulated gate type transistors as described in the second preferredembodiment is attainable by making a computer to read an evaluationprogram 30 for evaluating insulated gate type transistors from arecording medium storing the program 30, in accordance with theprocedure in FIG. 17 as described in the second preferred embodiment.

[0129] In the channel narrowing DW extraction according to the first orsecond preferred embodiment, when the mask cannel width W_(mNa) of anarrow transistor is significantly smaller than the mask cannel widthW_(mWi) of a wide transistor (i.e., W_(mNa)<<W_(mWi)), the differencebetween the mask channel width W_(mWi) and a gate finished width W_(gWi)hardly affects on determination of the value DW* of W_(m) coordinate ata virtual point, thereby determines the channel narrowing DW of thenarrow transistor at high accuracy. For instance, to evaluate device orcircuit performance on the level of not more than 1.0 μm in patternwidth, it is required to extract the channel narrowing DW of eachtransistor. For such an extraction, there are used two transistors,i.e., a narrow transistor and a wide transistor serving as a reference.In this case, the difference between a gate finished width W_(g) and amask channel width W_(m) depends on the transistor, causing an error.Thus, description will be now given of such an error. The value dW** ofW_(m) coordinate at a virtual point when a mask channel width W_(m) isused is given by Equation 20. $\begin{matrix}{{{dW}^{**}\left( V_{gt} \right)} = {\left( {W_{mNa} - {\frac{G_{mNa}}{G_{mWi}} \cdot W_{mWi}}} \right) \cdot \left( {1 - \frac{G_{mNa}}{G_{mWi}}} \right)^{- 1}}} & \left( {{Eq}.\quad 20} \right)\end{matrix}$

[0130] If W_(g) intercept in a plane formed by gate finished width andsource-drain conductance (i.e., W_(g)−G_(m) plane), is represented bydW_(g)**, Equation 21 is obtained. $\begin{matrix}{{{dW}_{g}^{**}\left( V_{gt} \right)} = {\left( {W_{gNa} - {\frac{G_{mNa}}{G_{mWi}} \cdot W_{gWi}}} \right) \cdot \left( {1 - \frac{G_{mNa}}{G_{mWi}}} \right)^{- 1}}} & \left( {{Eq}.\quad 21} \right)\end{matrix}$

[0131] If the difference between a gate finished width W_(g) and a maskchannel width W_(m) is represented by ΔW, the difference between thegate finished width W_(gWi) and mask channel width W_(mWi) of a widetransistor, and the difference between the gate finished width W_(gNa)and mask channel width W_(mNa) of a narrow transistor are represented byΔW_(wi) and ΔW_(Na), respectively, thus the relationships of Equations22 and 23 are established. From Equations 20 to 23, the differencebetween the coordinate value dW** of W_(m) intercept and the coordinatevalue DW_(g)* of W_(g) intercept is expressed by Equation 24, where ΔWis defined in Equation 25.

W _(gWi) =W _(mWi) +ΔW _(Wi)   (Eq. 22)

W _(gNa) =W _(mNa) +ΔW _(Na)   (Eq. 23)

[0132] $\begin{matrix}\begin{matrix}{{{dW}^{**} - {dW}_{g}^{**}}\quad = {{{- \Delta}\quad W_{Na}} + {{\frac{G_{mNa}}{G_{mWi}} \cdot \left( {1 - \frac{G_{mNa}}{G_{mWi}}} \right)^{- 1} \cdot \Delta}\quad W}}} \\{\quad {\approx {{{- \Delta}\quad W_{Na}} + {{\frac{G_{mNa}}{G_{mWi}} \cdot \Delta}\quad W}}}} \\{\quad {\approx {{{- \Delta}\quad W_{Na}} + {{\frac{W_{effNa}}{W_{effWi}} \cdot \Delta}\quad W}}}}\end{matrix} & \left( {{Eq}.\quad 24} \right)\end{matrix}$

ΔW=ΔW _(Wi) −ΔW _(Na)   (Eq. 25)

[0133] Equations 23 and 24 show that the effective channel width W_(eff)of a narrow transistor is extracted when the relationshipW_(mNa)<<W_(mWi) is established. In Equation 24, the second term of thelast expression indicates an error. If a relative error is representedby r, Equation 26 is obtained. Then, let be W_(gWi)≈W_(mWi), Equation 26is modified into Equation 27. $\begin{matrix}\left. {\frac{W_{effNa}}{W_{effWi}} \cdot} \middle| {\Delta \quad W} \middle| {< {r \cdot W_{effNa}}} \right. & \left( {{Eq}.\quad 26} \right) \\{W_{mWi} > \frac{\left| {\Delta \quad W} \right|}{r}} & \left( {{Eq}.\quad 27} \right)\end{matrix}$

[0134] Equation 27 imposes limitations upon the size of a widetransistor. For instance, when ΔW=0.1 μm and r=0.02, the mask channelwidth W_(mWi) of a wide transistor is required to be greater than 5 μm,in order to accurately extract the effective channel width of a narrowtransistor.

[0135] Also, in the case where a channel narrowing DW is determined from(2·dW**−DW*), it is desirable to determine a mask channel width W_(mWi)in a similar manner.

[0136] Third Preferred Embodiment

[0137] A characteristic evaluation method for insulated gate typetransistors according to a third preferred embodiment will be describedhereafter. In this method, a channel narrowing DW is extracted by usingthe drain currents of linear areas in two insulated gate typetransistors that have the same mask channel length L_(m) and a differentmask channel width W_(m).

[0138] The above characteristic evaluation method in the third preferredembodiment will be roughed out. As in the first preferred embodiment,there are firstly prepared two MOS transistors, each having the samechannel length L_(m) and a different mask channel width W_(m). Then, thethreshold voltage V_(thWi) of a wide transistor and the thresholdvoltage V_(thNa) of a narrow transistor are extrapolated fromI_(ds)−V_(gs) characteristic or the like. The threshold voltage V_(thNa)thus extracted is a first estimated value. Under the conditions that thegate overdrive V_(gt) of the wide transistor, i.e., a first gateoverdrive, is equal to the gate overdrive V_(gt) of the narrowtransistor, i.e., a second gate overdrive, a virtual point as describedlater is extracted in an X-Y plane whose X-axis is mask channel widthW_(m) and Y-axis is source-drain resistance R. This virtual point is notpresent as an actual measuring point, but is a virtual point on astraight line that passes through a first point whose X-coordinate isthe mask channel width W_(mWi) of the wide transistor and Y-coordinateis the source-drain resistance R_(Na) of the narrow transistor, and asecond point whose X-coordinate is the mask channel width W_(mNa) of thenarrow transistor and Y-coordinate is the source-drain resistance R_(Wi)of the wide transistor. Such a virtual point has the characteristicfeature that the change in source-drain resistance is approximately zeroeven when the first and second gate overdrives are finely changed.Therefore, as shown in FIG. 19, this virtual point is found as theintersection of two straight lines exhibiting the difference of δV_(gt)between the first and second gate overdrives. The X-coordinate (W_(m)coordinate) and Y-coordinate of the above intersection are representedby DW^(#) and R^(#), respectively. Note that the straight lines in thethird preferred embodiment contain curves that can be approximated to astraight line. In the event that a virtual point is located slightlyapart from the straight lines, a point in the vicinity of anintersection may be used.

[0139] The relationship of Equation 28 is established between theintersection coordinate (R^(#), DW^(#)) and the slope h of a straightline in FIG. 19. In Equation 28, a prime indicates the first-orderdifferentiation of V_(gt).

R ^(#) ′=h·DW ^(#)′  (Eq. 28)

[0140] The values of DW^(#), (δ, V_(gtWi)), R^(#)′(δ, V_(gtWi)), andh(δ, V_(gtWi)) are found from the source-drain resistance of a narrowtransistor R_(Na)(V_(gtWi)+δ−V_(thNa)+V_(thWi)) and the source-drainresistance of a wide transistor R_(Wi)(V_(gtWi)). Here at, δ is a shiftamount to be changed in calculating the difference between two truethreshold voltages V_(thWi), V_(thNa). When a shift amount δ is equal tothe threshold voltage difference between the wide and narrow transistors(V_(thNa)−V_(thWi)), the relationship of Equation 28 is established.Accordingly, the function F that is defined in Equation 29 is zero,irrespective of the gate overdrive V_(gt).

F(δ, V _(gtWi))=R ^(#)′(δ, V _(gtWi))−h(δ, V _(gtWi))·DW ^(#)′(δ, V_(gtWi))   (Eq. 29)

[0141] A shift amount δ is changed to determine the value of a trueshift amount δ₀ with which the standard deviation of function F is aminimum in a certain area of a gate overdrive V_(gt). Using the trueshift amount δ₀, the value dW** of X intercept is found by, for example,extrapolating straight lines as shown in FIG. 19. From the obtaineddW**, a channel narrowing DW is determined. An effective channel widthW_(eff) is a value that is obtained by reducing a channel narrowing DWfrom a mask channel width W_(m).

[0142] Referring to FIG. 20, extraction of the effective channel widthW_(eff) of an MOS transistor will be described in detail.

[0143]FIG. 20 shows the steps in a characteristic evaluation method forinsulated gate type transistors according to the third preferredembodiment. The above steps are the same as those in FIG. 4 in the firstpreferred embodiment which are designated by the same reference numeral,except for step ST1.20. In step ST1.20, the function F shown in Equation29 is calculated. In step ST1.9, by using a calculation result obtainedin step ST1.20, a true shift amount δ₀ is determined from a shift amountδ with which the standard deviation calculated in step ST1.7 is aminimum. Steps ST1.10 and ST1.11 in which from the above true shiftamount, a channel narrowing DW and an effective channel width W_(eff)are determined δ₀, respectively, are the same as in the characteristicevaluation method of the first preferred embodiment as shown in FIG. 4.

[0144] Although a channel narrowing DW_(Na) is determined from dW** instep ST1.11, a channel narrowing DW(V_(gt)) that is obtained when thegate overdrive V_(gt) is in the vicinity of zero may be determined asthe value DW^(#) of W_(m) coordinate at an intersection.

[0145] Description will be now given of a concrete procedure todetermine a channel narrowing DW and the like, from the standarddeviation of the function F shown in Equation 29. In the characteristicevaluation method of the third preferred embodiment, to reduce theuncertainty of threshold voltage extrapolation and, in particular, theerror due to the uncertainty of the threshold voltage extrapolation of atransistor having a narrow channel width, the relationship of Equation30 which is, for example, established between the value DW* of W_(m)coordinate at a virtual point and the value dW** of W_(m) intercept, isnoted to apply a variation method. Here at, since the differentiation ofan intersection coordinate (R^(#), DW^(#)) in Equation 29 may increasethe error of calculated values, Equation 30 is used in place of Equation29. $\begin{matrix}{{F\left( {\delta,V_{gtWi}} \right)} = {{{dW}^{**}\left( {\delta,V_{gtWi}} \right)} + {\frac{h\left( {\delta,V_{gtWi}} \right)}{h^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {{dW}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {{DW}^{\#}\left( {\delta,V_{gtWi}} \right)}}} & \left( {{Eq}.\quad 30} \right)\end{matrix}$

[0146] Firstly, to a certain shift amount δ, DW^(#)(V_(gtWi), δ) anddW**(V_(gtWi), δ) are given by Equations 31 and 32, respectively, whererri and rai are defined in Equations 33 and 34, respectively, and theslope h of a straight line is given by Equation 35. $\begin{matrix}{{DW}^{\#} = \frac{W_{mNa} - {{rri} \cdot W_{mWi}}}{1 - {rri}}} & \left( {{Eq}.\quad 31} \right) \\{{dW}^{**} = \frac{W_{mNa} - {{rai} \cdot W_{mWi}}}{1 - {rai}}} & \left( {{Eq}.\quad 32} \right) \\{{{rri}\left( {V_{gtWi},\delta} \right)} \equiv \frac{R_{Wi}^{\prime}\left( V_{gtWi} \right)}{R_{Na}^{\prime}\left( {V_{gtWi} + \delta - V_{thNa} + V_{thWi}} \right)}} & \left( {{Eq}.\quad 33} \right) \\{{{rai}\left( {V_{gtWi},\delta} \right)} \equiv \frac{R_{Wi}\left( V_{gtWi} \right)}{R_{Na}\left( {V_{gtWi} + \delta - V_{thNa} + V_{thWi}} \right)}} & \left( {{Eq}.\quad 34} \right) \\{{h\left( {V_{gtWi},\delta} \right)} = \frac{{R_{Na}\left( {V_{gtWi} + \delta - V_{thNa} + V_{thWi}} \right)} - {R_{Wi}\left( V_{gtWi} \right)}}{W_{mWi} - W_{mNa}}} & \left( {{Eq}.\quad 35} \right)\end{matrix}$

[0147] A shift amount δ is changed to find the value DW^(#) of W_(m)coordinate, the value dW** of W_(m) intercept and its rate of changedW**′, as well as the resistance R per unit width and its rate of changeR′.

[0148] When a shift amount δ is equal to the threshold voltagedifference δ₀ between narrow and wide transistors, the function Fdefined in Equation 30 is zero, irrespective of the gate overdriveV_(gtWi). Thus, let the value of a shift amount δ with which thestandard deviation of the function F becomes a minimum in an area of agate overdrive V_(gtWi) be a true shift amount δ₀ (see FIG. 21).

[0149] Then, let the value of dW** (V_(gt), δ₀) of W_(m) intercept whichis obtained by using a true shift amount δ₀, be a channel narrowingDW(V_(gt)).

[0150] Although in the third preferred embodiment a true shift amount δ₀is determined from the condition under which the standard deviation ofthe function F is a minimum, it may be determined from the conditionunder which the sum of values that are obtained by squaring each of thefunctions F to be found for discrete gate overdrives V_(gt), becomes aminimum. When calculating gate overdrive V_(gt) for about 20 points, thesum Z can be expressed by Equation 36. $\begin{matrix}{Z = {\sum\limits_{n = 1}^{20}\quad {F^{2}\left( V_{gtn} \right)}}} & \left( {{Eq}.\quad 36} \right)\end{matrix}$

[0151] Instead of Equation 30, any one of Equations 37 to 39 may be usedto find function F. $\begin{matrix}{{F\left( {\delta,V_{gtWi}} \right)} = {{\frac{h^{2}\left( {\delta,V_{gtWi}} \right)}{h^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {{dW}^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {R^{\#}\left( {\delta,V_{gtWi}} \right)}}} & \left( {{Eq}.\quad 37} \right) \\{{F\left( {\delta,V_{gtWi}} \right)} = {{R^{**}\left( {\delta,V_{gtWi}} \right)} - {\frac{h\left( {\delta,V_{gtWi}} \right)}{h^{\prime}\left( {\delta,V_{gtWi}} \right)} \cdot {R^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}} - {R^{\#}\left( {\delta,V_{gtWi}} \right)}}} & \left( {{Eq}.\quad 38} \right) \\{{F\left( {\delta,V_{gtWi}} \right)} = {\frac{R^{**^{\prime}}\left( {\delta,V_{gtWi}} \right)}{h^{\prime}\left( {\delta,V_{gtWi}} \right)} + {{DW}^{\#}\left( {\delta,V_{gtWi}} \right)}}} & \left( {{Eq}.\quad 39} \right)\end{matrix}$

[0152] In Equations 38 and 39, R** is the value of a source-drainresistance R when the value of a mask channel width W_(m) is set to bezero in R−W_(m) characteristic. Using mask channel width W_(m) to enteran X-axis and source-drain resistance R to enter a Y-axis, a R−W_(m)characteristic curve (straight line) is extrapolated to find the valueR** of a Y intercept and the value dW** of an X intercept which areobtained as X=0 and Y=0, respectively. The use of the value R** or dW**facilitates calculation. Although the accuracy remains unchanged withany one of Equations 30, and 37 to 39, it is necessary to calculate R**when using Equation 38 or 39. Thus, Equation 30 or 37 is preferred.

[0153] Although in the third preferred embodiment the value dW** ofW_(m) intercept obtained when a true shift amount δ₀ is used is employedas the value of a channel narrowing DW, the value of a channel narrowingDW obtained when a gate overdrive V_(gt) is in the vicinity of zero maybe given by the average of the values DW^(#) in the neighborhood wherethe value DW^(#) of W_(m) coordinate of an intersection has a minimumvalue (see FIG. 22). Since DW^(#) has a stationary point when the gateoverdrive V_(gt) has a value in the vicinity of zero, it is possible todetermine the value of a channel narrowing DW at higher accuracy thanthe case of using the value dW* of W_(m) intercept.

[0154] Referring to FIG. 23, a characteristic evaluation apparatus forinsulated gate type transistors according to the third preferredembodiment can be constructed by partially modifying the calculationsection 6 of the characteristic evaluation apparatus 1 of the firstpreferred embodiment in FIG. 8. Specifically, the parts to be modifiedare an extraction section 12B that extracts an intersection coordinate(DW^(#), R^(#)) as the coordinate of a virtual point, the value dW** ofW_(m) intercept, the value R** of R intercept, and the slope h of astraight line in the intersection coordinate; a true shift amountdetermination section 13B that determines a true shift amount δ₀ fromthe values extracted in the extraction section 12B; and a channelnarrowing determination section 14B that determines a channel narrowingby using a value giving a true shift amount δ₀ which is selected fromamong the values extracted in the extraction section 12B. Othercomponents of the calculation section 6B in FIG. 23 are the same asthose in the first preferred embodiment. The extraction section 12Bfurther extracts the rate of change dDW^(#)/dV_(gt), dR^(#)/dV_(gt) ofan intersection coordinate (DW^(#), R^(#)) and the slope h of acharacteristic curve in an area Ω with respect to each shift amount δ,by using the value of a mask channel width W_(m) provided from an inputsection 5, the measurement data of source-drain current I_(ds) andgate-source voltage V_(gt) that are provided from a control section 4.The true shift amount determination section 13B determines a virtualshift amount δ₀ with which the standard deviation of the function Fshown in Equation 29 becomes a minimum for the area Ω, by using the rateof change dDW^(#)/dV_(gt) of the W_(m) coordinate of an intersection,the rate of change dR^(#)/dV_(gt) of R coordinate of the intersection,and the slope h of the characteristic curve which have been extracted inthe extraction 12B. Upon determination of a true shift amount δ₀, theextraction section 12B outputs the true shift amount δ₀ or the valueDW^(#) of W_(m) coordinate of the corresponding intersection and valuedW** of W_(m) intercept, to a channel narrowing determination section14B. The section 14B determines a channel narrowing DW from the valuedW** of W_(m) intercept or the value DW^(#) of W_(m) coordinate in avirtual point, and performs the calculation shown in Equation 7, todetermine an effective channel width W_(eff).

[0155] Referring again to FIG. 9, the characteristic evaluation forinsulated gate type transistors as described in the third preferredembodiment is attainable by making a computer to read an evaluationprogram 30 for evaluating insulated gate type transistors from arecording medium storing the program 30, in accordance with theprocedure in FIG. 20 as described in the third preferred embodiment.

[0156] A method of manufacturing an insulted gate type transistoraccording to the third preferred embodiment can be implemented byemploying, in step ST52 shown in FIG. 10, the evaluation method of thethird preferred embodiment in place of that of the first preferredembodiment. This results in the same effects as in the case where theevaluation method of the first preferred embodiment is applied to amanufacturing method.

[0157] Fourth Preferred Embodiment

[0158] A characteristic evaluation method for insulated gate typetransistors according to a fourth preferred embodiment will be outlinedby referring to FIG. 24. FIG. 24 is a graph showing the relationshipbetween DW^(#) and gate overdrive V_(gt) that are found by thecharacteristic evaluation method for insulated gate type transistorsaccording to the fourth preferred embodiment. This graph shows thechange in the value DW^(#) of W_(m) coordinate of an intersection when atrue threshold voltage is used for three narrow transistors having adifferent mask channel width W_(mNa). Note that the mask channel widthW_(mWi) of a wide transistor that serves as a reference in extractingthe value DW^(#) of W_(m) coordinate for these transistors, is set tothe same value.

[0159] As shown by comparison of FIG. 24 with FIG. 25, if the value of ashift amount δ derives from a shift amount δ₀, the shape of aV_(gt)−DW^(#) characteristic curve changes, whereas even if the value ofa mask channel width W_(mNa) changes somewhat, the shape of aV_(gt)−DW^(#) characteristic curve remains unchanged. Hence, as to othertransistor having a different mask channel width W_(m), it is alsopossible to extract the true threshold voltage of a narrow transistor byfinding out one characteristic curve which coincides with that in thisgraph when the gate overdrive V_(gt) ranges from 0.3 to 1.2 V, forexample. In the fourth preferred embodiment, first and second gateoverdrives and first to fourth estimated values are defined as in thethird preferred embodiment.

[0160] One example of the characteristic evaluation method for insulatedgate type transistors according to the fourth preferred embodiment willbe described by referring to FIG. 26. In the method shown in FIG. 26,from characteristic curves that change variously depending on theestimated value of a threshold voltage V_(thNa), i.e., a first estimatedvalue, the characteristic curve in FIG. 24 is extracted based on thefact that the standard deviation of the curve is small in the range of0.2 to 0.6 V, for example. Since in the evaluation method of the fourthpreferred embodiment, the true threshold voltage δ₀ of a narrowtransistor is determined by utilizing the dependence of the value DW^(#)of W_(m) coordinate on a gate overdrive V_(gt), the true thresholdvoltage δ₀ is determined in a manner similar to that in the thirdpreferred embodiment.

[0161] The procedure of extracting an effective channel width W_(eff) inthe characteristic evaluation method of the fourth preferred embodimentis the same as that of the third preferred embodiment, except for stepsST1.30 to ST1.34 in FIG. 26, which correspond to steps ST1.20, ST1.7 andST1.9 to ST1.11 in FIG. 20, respectively.

[0162] In the loop composed of steps ST1.4 to ST1.8, at step ST1.30 thevalue DW^(#) of W_(m) coordinate at a virtual point is found. That is,the values DW^(#) of about twenty different gate overdrives V_(gtn) foreach shift amount δ are found. At step ST1.31, the average of the twentyDW^(#) values of DW^(#)(δ, V_(gt1)) to DW^(#)(δ, V_(gtn)), and thestandard deviation σ[DW^(#)] are calculated.

[0163] After repeat calculation for each shift amount δ (steps ST1.14 toST1.8) is terminated, at step ST1.32, a shit amount δ₀ for giving achannel narrowing DW is estimated, with which the standard deviation σbecomes a minimum. At step ST1.33, the channel narrowing DW is given bythe average of the values DW^(#) of W_(m) coordinates at a virtual pointwhen a shit amount is δ₀. At step ST1.34, an effective channel widthW_(eff) is determined by the difference between a mask channel width andthe channel narrowing DW.

[0164] Referring to FIG. 27, description will be now given of acharacteristic evaluation apparatus for insulated gate type transistorsaccording to the fourth preferred embodiment. A characteristicevaluation apparatus for insulated gate type transistors 1C shown inFIG. 27 is connected to a measuring device 3 for measuring an objectunder test 2, like the characteristic evaluation apparatus 1B of thethird preferred embodiment as shown in FIG. 23. In the construction ofthe characteristic evaluation apparatus 1C, the same reference numeralshave been retained for similar parts which have the same functions as inthe apparatus 1B of FIG. 23. That is, the characteristic evaluationapparatus 1C has the same structure as the apparatus 1B, except for anextraction section 12C, a true shift amount determination section 13Cand a channel narrowing determination section 14A in a calculationsection 6C.

[0165] The extraction section 12C of the characteristic evaluationapparatus 1C finds an intersection coordinate (DW^(#), R^(#)) bychanging a gate overdrive V_(gt) in an area Ω. The true shit amountdetermination section 13C finds a standard deviation σ[DW^(#)] from thevalue of the intersection coordinate (DW^(#), R^(#)) in the area Ω, todetermine a true shift amount δ₀. The extraction section 12C outputs thetrue shift amount δ₀ and the value DW^(#) of W_(m) coordinate at thecorresponding intersection or the value dW** of W_(m) intercept, to thechannel narrowing determination section 14C. The channel narrowingsection 14C determines a channel narrowing DW from the average of thevalues DW^(#) of W_(m) coordinates at virtual points within the area Ωfor the true shift amount δ₀, e.g., in the range of 0.2≦V_(gt)≦0.6.Alternatively, the section 14C determines the value dW** of W_(m)intercept related to the true shift amount δ₀, as a channel narrowingDW.

[0166] Referring again to FIG. 9, the characteristic evaluation forinsulated gate type transistors as described in the fourth preferredembodiment is attainable by making a computer to read an evaluationprogram 30 for evaluating insulated gate type transistors from arecording medium storing the program 30, in accordance with theprocedure in FIG. 20 as described in the fourth preferred embodiment.

[0167] A method of manufacturing an insulted gate type transistoraccording to the fourth preferred embodiment can be implemented byemploying, in step ST52 shown in FIG. 10, the evaluation method of thefourth preferred embodiment in place of that of the first preferredembodiment. This results in the same effects as in the case where theevaluation method of the first preferred embodiment is applied to amanufacturing method.

[0168] Although in the fourth preferred embodiment, a channel narrowingDW is determined so as to minimize the standard deviation σ[DW^(#)] ofthe value DW^(#) of W_(m) coordinate at an intersection or the standarddeviation σ[dW**] of the value dW** of W_(m) intercept, itsdetermination method is not limited to the above. For instance, thethreshold voltage V_(thNa) of a narrow transistor may be determined byselecting a characteristic curve in which the value DW** of W_(m)coordinate at an intersection is best converged on a fixed value whenthe gate overdrive V_(gt) is within a predetermined range.

[0169] When the mask channel width W_(mNa) of a narrow transistor issufficiently smaller than the mask channel width W_(mWi) of a widetransistor (W_(mNa)<<W_(mWi)), Equation 31 is approximated as shown inEquation 40. Accordingly, a channel narrowing DW may be determined sothat the standard deviation of the value of Equation 40 is a minimum.

DW ^(#) ≈W _(mNa) −rri·W _(mWi)   (Eq. 40)

[0170] Alternatively, in Equation 40 a channel narrowing DW may bedetermined under the condition that the standard deviation of a variablerri is a minimum, because mask channel widths W_(mWi) and W_(mNa) areboth constants.

[0171] Alternatively, since the condition that the standard deviation ofthe variation rri is a minimum is approximately equal to that thestandard deviation of its inverse number rri⁻¹ is a minimum, a channelnarrowing DW may be determined from the standard deviation of theinverse number rri⁻¹.

[0172] In the channel narrowing DW extraction according to the third orfourth preferred embodiment, when the mask cannel width W_(mNa) of anarrow transistor is significantly smaller than the mask channel widthW_(mWi) of a wide transistor (i.e., W_(mNa)<<W_(mWi)), the differencebetween the mask channel width W_(mwi) and a gate finished width W_(gWi)hardly affects on determination of the value DW* of W_(m) coordinate ata virtual point, thereby determines the channel narrowing DW of thenarrow transistor at high accuracy. For instance, to evaluate device orcircuit performance on the level of not more than 1.0 μm in patternwidth, it is required to extract the channel narrowing DW of eachtransistor. For such an extraction, there are used two transistors,i.e., a narrow transistor and a wide transistor serving as a reference.In this case, the difference between a gate finished width W_(g) and amask channel width W_(m) depends on the transistor, causing errors.Thus, description will be now given of such errors. The value DW^(#) ofW_(m) coordinate at a virtual point when a mask channel width W_(m) isused is given by Equation 41. $\begin{matrix}{{DW}^{\#} = {\left( {W_{mNa} - {\frac{R_{Wi}^{\prime}}{R_{Na}^{\prime}} \cdot W_{mWi}}} \right) \cdot \left( {1 - \frac{R_{Wi}^{\prime}}{R_{Na}^{\prime}}} \right)^{- 1}}} & \left( {{Eq}.\quad 41} \right)\end{matrix}$

[0173] If W_(g) coordinate of an intersection in a plane formed by gatefinished width and source-drain conductance (i.e., a W_(g)−R plane) isrepresented by DW_(g) ^(#), the following Equation 42 is obtained.$\begin{matrix}{{DW}_{g}^{\#} = {\left( {W_{gNa} - {\frac{R_{Wi}^{\prime}}{R_{Na}^{\prime}} \cdot W_{gWi}}} \right) \cdot \left( {1 - \frac{R_{Wi}^{\prime}}{R_{Na}^{\prime}}} \right)^{- 1}}} & \left( {{Eq}.\quad 42} \right)\end{matrix}$

[0174] If the difference between a gate finished width W_(g) and a maskchannel width W_(m) is represented by ΔW, the difference between thegate finished width W_(gWi) and mask channel width W_(mWi) of a widetransistor, and the difference between the gate finished width W_(gNa)and a mask channel width W_(mNa) of a narrow transistor, are representedby ΔW_(Wi) and ΔW_(Na), respectively. Therefore, the relationships ofEquations 43 and 44 are established. Then, from Equations 41 to 44, thedifference between the value DW** of W_(m) coordinate and the valueDW_(g)* of W_(g) coordinate at an intersection is expressed by Equation45, where ΔW is defined in Equation 46.

W _(gWi) =W _(mWi) +ΔW _(Wi)   (Eq. 43)

W _(gNa) =W _(mNa) +ΔW _(Na)   (Eq. 44)

[0175] $\begin{matrix}\begin{matrix}{{{DW}^{\#} - {DW}_{g}^{\#}} = \quad {{{- \Delta}\quad W_{Na}} + {{\frac{R_{Wi}^{\prime}}{R_{Na}^{\prime}} \cdot \left( {1 - \frac{R_{Wi}^{\prime}}{R_{Na}^{\prime}}} \right)^{- 1} \cdot \Delta}\quad W}}} \\{\approx \quad {{{- \Delta}\quad W_{Na}} + {{\frac{G_{Wi}^{\prime}}{R_{Na}^{\prime}} \cdot \Delta}\quad W}}} \\{\approx \quad {{{- \Delta}\quad W_{Na}} + {{\frac{W_{effNa}}{W_{effWi}} \cdot \Delta}\quad W}}}\end{matrix} & \left( {{Eq}.\quad 45} \right)\end{matrix}$

ΔW=ΔW _(Wi) −ΔW _(Na)   (Eq. 46)

[0176] Equations 43 and 44 show that the effective channel width W_(eff)of a narrow transistor is extracted when the relationshipW_(mNa)<<W_(mWi) is established. In Equation 45, the second term of thelast expression indicates an error. If a relative error is representedby r, it results in Equation 26. Therefore, again in the third andfourth preferred embodiments, to make a relative error smaller than thedesired value, the same limitations are imposed upon the mask channelwidth W_(gWi) of a wide transistor, as in the first and second preferredembodiments.

[0177] Consider now the influence of unequal channel lengths due to theirregularity of finished polygate. Source-drain resistance R_(tot) isdefined in Equation 47, where g is a channel sheet resistance.$\begin{matrix}{R = {{\frac{L_{eff}}{W_{eff}} \cdot g} + R_{sd}}} & \left( {{Eq}.\quad 47} \right)\end{matrix}$

[0178] Let the difference in the channel length L between a narrowtransistor and a wide transistor be ΔL (=L_(effNa)−L_(effWi)) Equations47 can be modified into Equation 48. $\begin{matrix}{R \approx {{\frac{L_{effWi}}{W_{effNa} \cdot \left( {1 - \frac{\Delta \quad L}{L_{effWi}}} \right)} \cdot g} + R_{sd}}} & \left( {{Eq}.\quad 48} \right)\end{matrix}$

[0179] Supposing a sheet resistance g is independent of an effectivechannel length L_(eff), Equation 48 shows that an effective channellength L_(effNa) appears to be increased by a factor of(1−ΔL/L_(effWi)). Now, expressing a relative error by r, an error Δr isexpressed by Equation 49. $\begin{matrix}{{W_{effNa} \cdot \frac{{\Delta \quad L}}{L_{effWi}}} < {r \cdot W_{effNa}}} & \left( {{Eq}.\quad 49} \right)\end{matrix}$

[0180] Supposing that an effective channel length L_(effWi) isapproximately equal to a mask channel length L_(mWi), Equation 49 can bemodified into Equation 50. $\begin{matrix}{L_{mWi} > \frac{{\Delta \quad L}}{r}} & \left( {{Eq}.\quad 50} \right)\end{matrix}$

[0181] Equation 50 imposes limitations upon the mask channel lengthL_(mWi) of a wide transistor to be used in extraction. For instance,when ΔL=0.1 μm and r=0.02, the mask channel width W_(mWi) of a widetransistor is required to be greater than 5 μm, in order to accuratelyextract the effective channel width of a narrow transistor.

[0182] Description will be now given of the case where thecharacteristic evaluation method for insulated gate type transistorsaccording to the first preferred embodiment (hereinafter referred to asGm method) or that of the third preferred embodiment (referred to as Rmmethod) is applied to a MOS transistor having a mask channel width W_(m)of 0.36 μm and a mask channel length L_(m) of 20.4 μm. FIG. 28 gives acomparison among the channel narrowing DW (obtained by Gm method), DW(by Rm method), and DW (by Chia method). Both Gm and Rm methods providenearly the same result. Since it is generally difficult to accuratelydetermine a threshold voltage V_(th), Gm method and Rm method ensuremore accurate channel narrowing DW than Chia method.

[0183] Then, it is checked how the value dW* of W_(m) intercept and thevalues DW*, DW^(#) of W coordinate at an intersection depend on the gateoverdrive V_(gt) in the vicinity of zero. Now, expanding the channelnarrowing DW, the slope h of a straight line and the inverse number g(g=1/f) of the slope f of the straight line, to the power of a gateoverdrive V_(gt), Equations 51 to 53 are obtained where DWG1, DWG2, andA to D are an arbitrary constant.

DW=δW−DWG1·V _(gt) −DWG2·V _(gt) ² +O(V _(gt) ³)   (Eq. 51)

[0184] $\begin{matrix}{h = {\frac{A}{V_{gt}} + B + {O\left( V_{gt} \right)}}} & \left( {{Eq}.\quad 52} \right) \\{g = {\frac{C}{V_{gt}} + D + {O\left( V_{gt} \right)}}} & \left( {{Eq}.\quad 53} \right)\end{matrix}$

[0185] In this case, dW**, DW* and DW^(#) are expanded as follows.$\begin{matrix}{{dW}^{**} \approx {{\delta \quad W} - {{DWG1} \cdot {DWG2} \cdot V_{gt}^{2}} + {O\left( V_{gt}^{3} \right)}}} & \left( {{Eq}.\quad 54} \right) \\{{DW}^{*} \approx {{\delta \quad W} - {2 \cdot {DWG1} \cdot V_{gt}} - {\left( {{3 \cdot {DWG2}} + {\frac{D}{C} \cdot {DWG1}}} \right) \cdot V_{gt}^{2}} + {O\left( V_{gt}^{3} \right)}}} & \left( {{Eq}.\quad 55} \right) \\{{dW}^{\#} \approx {{\delta \quad W} + {\left( {{DWG2} + {\frac{B}{A} \cdot {DWG1}}} \right) \cdot V_{gt}^{2}} + {O\left( V_{gt}^{3} \right)}}} & \left( {{Eq}.\quad 56} \right)\end{matrix}$

[0186] Equations 54 to 56 indicate the following matters. When dW**, DW*and DW^(#) are brought to near zero, they all converge on δW. When DWG1and DWG2 are both positive numbers, DW* decreases rapidly than dW** asthe gate overdrive V_(gt) increases. DW^(#) has a stationary point atV_(gt)=0, and increases by the square of V_(gt) as the gate overdriveV_(gt) increases. These indicate that the results given in FIGS. 6 and22 are correct.

[0187] Also, the presence of the stationary point at V_(gt)=0 suggeststhe possibility that δW is determined so that DW^(#) is constant whenV_(gt) is in the vicinity of zero. This is the case where “shift andratio method” is applied to the extraction of a channel narrowing DW(this method is described, for example, in “A New “Shift and Ratio”Method for MOSFT Channel Length Extraction,” IEEE Elect. Dev. Lett.,EDL-13(5), p.267, 1992, by Y. Taur et al.). This method actually givesproper values, however, its extraction result depends greatly on thearea of a gate overdrive V_(gt) for calculation (see FIG. 29). On theother hand, both Rm method and Gm method are independent of the area ofa gate overdrive V_(gt) for calculation, and also can give nearly thesame result.

[0188] While the invention has been shown and described in detail, theforegoing description is in all aspects illustrative and notrestrictive. It is therefore understood that numerous modifications andvariations can be devised without departing from the scope of theinvention.

I claim:
 1. A method of manufacturing insulated gate type transistors,comprising the steps of: forming at least two insulated gate typetransistors that differ from each other only in mask channel width;measuring drain current characteristics of said two insulated gate typetransistors by changing a gate voltage and a source-drain voltage;determining an effective channel width of said two insulated gate typetransistors using a predetermined characteristic evaluation method forinsulated gate type transistors; and judging whether said effectivechannel width satisfies a specification, wherein one of said at leasttwo insulated gate type transistors having a wider mask channel width isdefined as a first insulated gate type transistor and the other having amore narrow mask channel width is defined as a second insulated gatetype transistor, said predetermined characteristic evaluation method forinsulted gate type transistors comprising steps of: extracting athreshold voltage of said first transistor, estimating the thresholdvoltage of said second transistor, and employing a value as estimated asa first estimated value; (i) defining a difference between a gatevoltage of said first transistor and said extracted threshold voltage ofsaid first transistor as a first gate overdrive, and defining adifference between a gate voltage of said second transistor and saidfirst estimated value as a second gate overdrive, (ii) under thecondition that said first and second gate overdrives are the same in anX-Y plane whose X-axis is said mask channel width and whose Y-axis issource-drain resistance, estimating and extracting a virtual point atwhich a change in Y coordinate value to be approximately zero even ifsaid first and second gate overdrives are finely changed from points ona straight line passing through a first point whose X coordinate is saidmask channel width of said first transistor and whose Y coordinate issaid source-drain resistance of said second transistor, and a secondpoint whose X coordinate is said mask channel width of said secondtransistor and whose Y coordinate is said source-drain resistance ofsaid first transistor, (iii) defining values of the X coordinate and theY coordinate at said virtual points as second and third estimatedvalues, respectively, and (iv) extracting a slope of said straight lineat said virtual points and employing a value of said slope as a fourthestimated value; determining a true threshold voltage of said secondtransistor by using said first to fourth estimated values; anddetermining a difference between said mask channel width and aneffective channel width based on said true threshold voltage.